US 7803722: "Methods for forming a dielectric layer within trenches"



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Patent Overview

Patent Title: Methods for forming a dielectric layer within trenches
Patent Number: 7803722 Filing Date: Oct 22, 2007
Application Number: 11876657 Issue Date: Sep 28, 2010
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Claims

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1. A method for forming a semiconductor structure, comprising: reacting a silicon precursor and an atomic oxygen precursor at a processing temperature of about 150 C. or less to form a silicon oxide layer over a substrate; and UV-O3 curing the silicon oxide layer within an ozone containing environment.

2. The method of claim 1 further comprising forming at least one trench structure within the substrate, wherein the at least one trench structure has a height to width aspect ratio of about 5:1 or more.

3. The method of claim 1 further comprising: providing the substrate to a deposition chamber; generating the atomic oxygen precursor outside the deposition chamber; introducing the atomic oxygen precursor into the chamber; and introducing the silicon precursor to the deposition chamber, wherein the silicon precursor and the atomic oxygen precursor are mixed in the deposition chamber.

4. The method of claim 3, wherein generating the atomic oxygen precursor comprises: forming a plasma from a gas mixture comprising argon; and introducing an oxygen precursor to the plasma, wherein the oxygen precursor dissociates to form the atomic oxygen.

5. The method of claim 4, wherein the oxygen precursor is selected from the group consisting of molecular oxygen, ozone, and nitrogen dioxide.

6. The method of claim 1, wherein the silicon precursor is selected from the group consisting of silane, dimethylsilane, trimethylsilane, tetramethylsilane, diethylsilane, tetramethylorthosilicate (TMOS), tetraethylorthosilicate (TEOS), octamethyltrisiloxane (OMTS), octamethylcyclotetrasiloxane (OMCTS), tetramethylcyclotetrasiloxane (TOMCATS), DMDMOS, DEMS, methyl triethoxysilane (MTES), phenyldimethylsilane, and phenylsilane.

7. The method of claim 1, wherein UV-O3 curing the silicon oxide layer has a processing temperature between about 20 C. and about 650 C.

8. The method of claim 1, wherein the ozone containing environment comprises a mixture of ozone and oxygen.

9. The method of claim 8, wherein the ozone has a percentage of about 18% or less.

10. The method of claim 1, wherein UV-O3 curing the silicon oxide layer has a processing time between about 1 minute and about 10 minutes.

11. The method of claim 1, wherein UV-O3 curing the silicon oxide layer has an UV wavelength between about 200 nanometer (nm) and about 450 nm.

Classifications

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US ClassificationDescription
438/758000 SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS
^----COATING OF SUBSTRATE CONTAINING SEMICONDUCTOR REGION OR OF SEMICONDUCTOR SUBSTRATE
438/788000 SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS
^----COATING OF SUBSTRATE CONTAINING SEMICONDUCTOR REGION OR OF SEMICONDUCTOR SUBSTRATE
     ^----Insulative material deposited upon semiconductive substrate
          ^----Silicon oxide formation
               ^----Using electromagnetic or wave energy (e.g., photo-induced deposition, plasma, etc.)
438/792000 SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS
^----COATING OF SUBSTRATE CONTAINING SEMICONDUCTOR REGION OR OF SEMICONDUCTOR SUBSTRATE
     ^----Insulative material deposited upon semiconductive substrate
          ^----Silicon nitride formation
               ^----Utilizing electromagnetic or wave energy (e.g., photo-induced deposition, plasma, etc.)
257/E21487 ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES)
^----PROCESSES OR APPARATUS ADAPTED FOR MANUFACTURE OR TREATMENT OF SEMICONDUCTOR OR SOLID-STATE DEVICES OR OF PARTS THEREOF (EPO)
     ^----Manufacture or treatment of semiconductor device (EPO)
          ^----Device having at least one potential-jump barrier or surface barrier, e.g., PN junction, depletion layer, carrier concentration layer (EPO)
               ^----Device having semiconductor body other than carbon, Si, Ge, SiC, Se, Te, Cu 2 O, CuI, and Group III-V compounds with or without impurities, e.g., doping materials (EPO)
                    ^----Treatment of semiconductor body using process other than electromagnetic radiation (EPO)
                         ^----To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (EPO)
                              ^----To form insulating layer thereon, e.g., for masking or by using photolithographic techniques; post treatment of these layers (EPO)

References

(click to expand)

Patent Number Author Title Cited by:
4147571 Stringfellow et al. Method for vapor epitaxial deposition of III/V materials utilizing organometallic compounds and a halogen or halide in a hot wall system other
4816098 Davis et al. Apparatus for transferring workpieces other
4818326 Liu et al. Processing apparatus other
4931354 Wakino et al. Multilayer printed circuit board other
5016332 Reichelderfer et al. Plasma reactor and process with wafer temperature control other
5110407 Ono et al. Surface fabricating device other
5426076 Moghadam Dielectric deposition and cleaning process for improved gap filling and device planarization other
5558717 Zhao et al. CVD Processing chamber other
5587014 Leychika et al. Method for manufacturing group III-V compound semiconductor crystals other
5622784 Okaue et al. Synthetic resin ophthalmic lens having an inorganic coating other
5635409 Moslehi Real-time multi-zone semiconductor wafer temperature and process uniformity control system other
5786263 Perera other
5853607 Zhao et al. CVD processing chamber other
5937308 Gardner et al. Semiconductor trench isolation structure formed substantially within a single chamber other
5937323 Orczyk et al. Sequencing of the recipe steps for the optimal low-k HDP-CVD processing other
6009830 Li et al. Independent gas feeds in a plasma reactor other
6024044 Law et al. Dual frequency excitation of plasma for film deposition other
6087243 Wang Method of forming trench isolation with high integrity, ultra thin gate oxide other
6090723 Thakur et al. Conditioning of dielectric materials other
6140242 Oh et al. Method of forming an isolation trench in a semiconductor device including annealing at an increased temperature other
6146970 Witek et al. other
6156581 Vaudo et al. GaN-based devices using (Ga, AL, In)N base layers other
6165834 Agarwal et al. Method of forming capacitors, method of processing dielectric layers, method of forming a DRAM cell examiner
6207587 Li et al. Method for forming a dielectric other
6302964 Umotoy et al. One-piece dual gas faceplate for a showerhead in a semiconductor wafer processing system other
6383954 Wang et al. Process gas distribution for forming stable fluorine-doped silicate glass and other films other
6387207 Janakiraman et al. Integration of remote plasma generator with semiconductor processing chamber other
6406677 Carter et al. other
6448187 Yau et al. Method of improving moisture resistance of low dielectric constant films other
6503557 Joret Process for depositing at least one thin layer based on silicon nitride or oxynitride on a transparent substrate other
6506253 Sakuma Photo-excited gas processing apparatus for semiconductor process other
6508879 Hashimoto Method of fabricating group III-V nitride compound semiconductor and method of fabricating semiconductor device other
6509283 Thomas Thermal oxidation method utilizing atomic oxygen to reduce dangling bonds in silicon dioxide grown on silicon other
6524931 Perera other
6528332 Mahanpour et al. Method and system for reducing polymer build up during plasma etch of an intermetal dielectric other
6544900 Raaijmakers et al. In situ dielectric stacks other
6548416 Han et al. other
6566278 Harvey et al. Method for densification of CVD carbon-doped silicon oxide films through UV irradiation other
6596654 Bayman et al. Gap fill for high aspect ratio structures other
6614181 Harvey et al. UV radiation source for densification of CVD carbon-doped silicon oxide films other
6630413 Todd CVD syntheses of silicon nitride materials other
6660391 Rose et al. other
6676751 Solomon et al. Epitaxial film produced by sequential hydride vapor phase epitaxy other
6683364 Oh et al. Integrated circuit devices including an isolation region defining an active region area and methods for manufacturing the same other
6716770 O'Neill et al. Low dielectric constant material and method of processing by CVD other
6756085 Waldfried et al. Ultraviolet curing processes for advanced low-k materials other
6787191 Hanahata et al. Coating composition for the production of insulating thin films other
6794290 Papasouliotis et al. Method of chemical modification of structure topography other
6818517 Maes Methods of depositing two or more layers on a substrate in situ other
6830624 Janakiraman et al. Blocker plate by-pass for remote plasma clean other
6833052 Li et al. Deposition chamber and method for depositing low dielectric constant films other
6833322 Anderson et al. Apparatuses and methods for depositing an oxide film other
6867086 Chen et al. Multi-step deposition and etch back gap fill process other
6890403 Cheung Apparatus and process for controlling the temperature of a substrate in a plasma reactor other
6900067 Kobayashi et al. Growth of III-nitride films on mismatched substrates without conventional low temperature nucleation layers other
6955836 Kumagi et al. Silicon oxide film formation method other
6958112 Karim et al. Methods and systems for high-aspect-ratio gapfill using atomic-oxygen generation other
7018902 Visoday et al. Gate dielectric and method other
7084076 Park et al. Method for forming silicon dioxide film using siloxane other
7115419 Suzuki Process for producing a film for controlling the chemotactic function and an artificial material and process for producing the artificial material other
7148155 Tarafdar et al. Sequential deposition/anneal film densification method other
7205248 Li et al. Method of eliminating residual carbon from flowable oxide fill other
7220461 Hasebe et al. Method and apparatus for forming silicon oxide film other
7399388 Moghadam et al. Sequential gas flow oxide deposition technique other
7419903 Haukka et al. Thin films other
7435661 Miller et al. Polish stop and sealing layer for manufacture of semiconductor devices with deep trench isolation other
7498273 Mallick et al. Formation of high quality dielectric films of silicon dioxide for STI: usage of different siloxane-based precursors for harp II?remote plasma enhanced deposition processes other
7524735 Gauri et al. Flowable film dielectric gap fill process other
7541297 Mallick et al. Method and system for improving dielectric film quality for void free gap fill other
20010021595 Jang et al. other
20010029114 Vulpio et al. other
20010038919 Berry et al. other
20010054387 Frankel et al. other
20020048969 Suzuki et al. other
20020127350 Ishikawa et al. other
20020142585 Mandal other
20020146879 Fu et al. other
20020164891 Gates et al. other
20030064154 Laxman et al. other
20030118748 Kumagai et al. other
20030124873 Xing et al. other
20030143841 Yang et al. other
20030159656 Tan et al. other
20030172872 Thakus et al. other
20030232495 Moghadam et al. other
20040008334 Sreenivasan et al. other
20040048492 Ishikawa et al. other
20040065253 Pois et al. other
20040079118 M'Saad et al. other
20040146661 Kapoor et al. other
20040152342 Li et al. other
20040161899 Luo et al. other
20040175501 Lukas et al. other
20040180557 Park et al. other
20040185641 Tanabe et al. other
20040241342 Karim et al. other
20050001556 Hoffman et al. Capacitively coupled plasma reactor with magnetic plasma control other
20050019494 Moghadam et al. Sequential gas flow oxide deposition technique other
20050062165 Saenger et al. Method of forming closed air gap interconnects and structures formed thereby other
20050087140 Yuda et al. Remote plasma apparatus for processing substrate with two types of gases other
20050142895 Ingle et al. Gap-fill depositions in the formation of silicon containing dielectric materials other
20050181555 Haukka et al. Thin films other
20050186731 Derderian et al. Atomic layer deposition method of forming an oxide comprising layer on a substrate examiner
20050196533 Hasebe et al. Method and apparatus for forming silicon oxide film other
20050227499 Park et al. Oxide-like seasoning for dielectric low k films other
20050250340 Chen et al. HDP-CVD seasoning process for high power HDP-CVD gapfil to improve particle performance other
20060011984 Curie Control of strain in device layers by selective relaxation other
20060014399 Joe Low-temperature plasma-enhanced chemical vapor deposition of silicon-nitrogen-containing films other
20060030165 Ingle et al. Multi-step anneal of thin films for film densification and improved gap-fill other
20060055004 Gates et al. Low K and ultra low K SiCOH dielectric films and methods to form the same other
20060068599 Baek et al. Methods of forming a thin layer for a semiconductor device and apparatus for performing the same other
20060096540 Choi Apparatus to manufacture semiconductor other
20060110943 Swerts et al. Remote plasma activated nitridation other
20060121394 Chi Shallow trench filled with two or more dielectrics for isolation and coupling for stress control other
20060162661 Jung et al. Mixing energized and non-energized gases for silicon nitride deposition other
20060178018 Olsen Silicon oxynitride gate dielectric formation using multiple annealing steps other
20060223315 Yokota et al. Thermal oxidation of silicon using ozone other
20060228903 McSwiney et al. Precursors for the deposition of carbon-doped silicon nitride or silicon oxynitride films other
20060281496 Cedraeus Method for a random-based decision-making process other
20060286776 Ranish et al. METHOD FOR FORMING SILICON-CONTAINING MATERIALS DURING A PHOTOEXCITATION DEPOSITION PROCESS other
20070020392 Kobrin et al. Functional organic based vapor deposited coatings adhered by an oxide layer other
20070026689 Nakata et al. Silica film forming material, silica film and method of manufacturing the same, multilayer wiring structure and method of manufacturing the same, and semiconductor device and method of manufacturing the same other
20070049044 Marsh Porous organosilicate layers, and vapor deposition systems and methods for preparing same other
20070077777 Gumpher Method of forming a silicon oxynitride film with tensile stress other
20070092661 Ryuzaki et al. Liquid crystal display device and dielectric film usable in the liquid crystal display device other
20070128864 Ma et al. APPARATUS AND PROCESS FOR PLASMA-ENHANCED ATOMIC LAYER DEPOSITION other
20070173073 Weber Porous silicon dielectric other
20070181966 Watatani et al. other
20070232082 Balseanu et al. METHOD TO IMPROVE THE STEP COVERAGE AND PATTERN LOADING FOR DIELECTRIC FILMS other
20070281495 Mallick et al. FORMATION OF HIGH QUALITY DIELECTRIC FILMS OF SILICON DIOXIDE FOR STI: USAGE OF DIFFERENT SILOXANE-BASED PRECURSORS FOR HARP II - REMOTE PLASMA ENHANCED DEPOSITION PROCESSES examiner
20070281496 Ingle et al. CHEMICAL VAPOR DEPOSITION OF HIGH QUALITY FLOW-LIKE SILICON DIOXIDE USING A SILICON CONTAINING PRECURSOR AND ATOMIC OXYGEN other
20080085607 Yu et al. Method for modulating stresses of a contact etch stop layer examiner
20080102223 Wagner et al. Hybrid layers for use in coatings on electronic devices or other articles other
20090061647 Mallick et al. CURING METHODS FOR SILICON DIOXIDE THIN FILMS DEPOSITED FROM ALKOXYSILANE PRECURSOR WITH HARP II PROCESS other
DE 19654737 other
EP 1717848 other
JP 01241826 other
WO WO 02/077320 other
WO WO 03/066933 other
WO WO 2005/078784 other
WO WO 2007/040856 other
WO WO 2007/140376 other
WO WO 2007/140424 other

Referenced By:

(click to expand)

Patent Number Issue Date Title Author
8329262 Dec 11, 2012 Dielectric film formation using inert gas excitation Miller, Matthew L.; Yang, Jang-Gyoo
7989365 Aug 02, 2011 Remote plasma source seasoning Park, Soonam; Jeon, Soo; Tran, Toan Q.; Yang, Jang-Gyoo; Liang, Qiwei; Lubomirsky, Dmitry
7902080 Mar 08, 2011 Deposition-plasma cure cycle process to enhance film quality of silicon dioxide Chen, Xiaolin; Nemani, Srinivas D.; Venkataraman, Shankar
8232176 Jul 31, 2012 Dielectric deposition and etch back processes for bottom up gapfill Lubomirsky, Dmitry; Nemani, Srinivas D.; Yieh, Ellie
8236708 Aug 07, 2012 Si) as silicon precursor Kweskin, Sasha; Gee, Paul Edward; Venkataraman, Shankar; Sapre, Kedar
8318584 Nov 27, 2012 Oxide-rich liner layer for flowable CVD gapfill Li, DongQing; Liang, Jingmei; Ingle, Nitin K.
7867923 Jan 11, 2011 High quality silicon oxide films by remote plasma CVD from disilane precursors Mallick, Abhijit Basu; Nemani, Srinivas D.; Yieh, Ellie
7935643 May 03, 2011 Stress management for tensile films Liang, Jingmei; Patel, Anjana M.; Ingle, Nitin K.; Venkataraman, Shankar
7943531 May 17, 2011 Methods for forming a silicon oxide layer over a substrate Nemani, Srinivas D.; Mallick, Abhijit Basu; Yieh, Ellie Y.
7994019 Aug 09, 2011 Silicon-ozone CVD with reduced pattern loading using incubation period deposition Kweskin, Sasha; Gee, Paul Edward; Venkataraman, Shankar; Sapre, Kedar
8242031 Aug 14, 2012 High quality silicon oxide films by remote plasma CVD from disilane precursors Mallick, Abhijit Basu; Nemani, Srinivas D.; Yieh, Ellie
8304351 Nov 06, 2012 In-situ ozone cure for radical-component CVD Wang, Linlin; Mallick, Abhijit Basu; Ingle, Nitin K.; Venkataraman, Shankar

Description

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CROSS-REFERENCES TO RELATED APPLICATIONS


This application is related to a co-assigned U.S. Patent Application and titled ?CHEMICAL VAPOR DEPOSITION OF HIGH QUALITY FLOW-LIKE SILICON DIOXIDE USING A SILICON CONTAINING PRECURSOR AND ATOMIC OXYGEN.? This application is also related to a co-assigned U.S. patent application Ser. No. 11/754,924 by Lubomirsky et al., filed May 29, 2007, and titled ?PROCESS CHAMBER FOR DIELECTRIC GAPFILL.? The application is further related to a co-assigned U.S. Patent Application and titled ?HIGH QUALITY SILICON OXIDE FILMS BY REMOTE PLASMA CVD FROM DISILANE PRECURSORS.? The entire contents of the related applications are hereby incorporated by reference for all purposes.

BACKGROUND OF THE INVENTION


The present invention relates in general to methods for forming semiconductor structures, and more particular to methods for forming a dielectric layer within trenches.

As the device density on integrated circuits continues to increase, the size and distance between device structures continue to decrease. The narrower widths in the gaps of the structures and the trenches between structures increases the ratio of height to width (i.e., the aspect ratio) in these formations. The continued miniaturization of integrated circuit elements is shrinking the horizontal width within and between these elements faster than their vertical height.

While the ability to make device structures with ever increasing aspect ratios has allowed more of the structures (e.g., transistors, capacitors, diodes, etc.) to be packed onto the same surface area of a semiconductor chip substrate, it has also created fabrication problems. One of these problems is the difficulty of completely filling the gaps and trenches in these structures without creating a void or seam during the filling process. Filling gaps and trenches with dielectric materials like silicon oxide is necessary to electrically isolate nearby device structures from each other. If the gaps were left empty, there would be too much electrical noise, and current leakage for the devices to operate properly (or at all).

When gap widths are larger (and aspect ratios smaller), the gaps are relatively easy to fill with a rapid deposit of a dielectric material. The deposition material would blanket the sides and bottom of the gap and continue to fill from the bottom up until the crevice or trench was fully filled. As aspect ratios increased however, it became more difficult to fill the deep, narrow trench without having a blockage start a void or seam in the fill volume.

Voids and seams in a dielectric layer create problems both during semiconductor device fabrication and in the finished devices. The voids and seams are formed randomly in the dielectric layer and have unpredictable sizes, shapes, locations and population densities. This results in unpredictable and inconsistent post-deposition processing of the layer, such as even etching, polishing, annealing, etc. The voids and seams in the finished devices also create variations in the dielectric qualities of gaps and trenches in device structures. This can result in uneven and inferior device performance due to electrical crosstalk, charge leakage, and even shorting within and between device elements.

Techniques have been developed to minimize the formation of voids and seams during deposition of dielectric materials on high aspect ratio structures. These include slowing the deposition rate of the dielectric material so it stays more conformal to the sidewalls and bottom of the trench. A more conformal deposition can reduce the degree to which the deposited material builds up at the top or middle of the trench and eventually seals off the top of a void. However, slowing the deposition rate means increasing the deposition time, which reduces processing efficiency and production rates.

Another technique to control void formation is to increase the flowability of the deposited dielectric material. A material with more flowability can fill the trenches quickly from bottom up, and this desirably prevents void or seam formation that would become a permanent defect in the fill volume. Increasing the flowability of a silicon oxide dielectric material often involves adding water vapor or peroxide (e.g., H2O2) to the mix of precursors used to form the oxide layer. The water vapor creates more Si?OH bonds in the deposited film which impart an increased flowability to the film. However, increasing the moisture level during a silicon oxide deposition can also adversely effect the properties of the deposited film, including its density (i.e., an increased wet etch rate ratio (WERR)) and dielectric properties (i.e., an increased k-value).

BRIEF SUMMARY OF THE INVENTION


According to an exemplary embodiment, a method for forming a semiconductor structure includes reacting a silicon precursor and an atomic oxygen precursor at a processing temperature of about 150 C. or less to form a silicon oxide layer over a substrate. The silicon oxide layer is ultra-violet (UV) cured within an oxygen-containing environment.

According to another exemplary embodiment, the method further includes forming at least one trench structure within the substrate, wherein the at least one trench structure has a height to width aspect ratio of about 5:1 or more.

According to the other exemplary embodiment, the method further includes providing the substrate to a deposition chamber; generating the atomic oxygen precursor outside the deposition chamber; introducing the atomic oxygen precursor into the chamber; and introducing the silicon precursor to the deposition chamber, wherein the silicon precursor and the atomic oxygen precursor are mixed in the deposition chamber.

According to alternative exemplary embodiment, the generating the atomic oxygen precursor includes: forming a plasma from a gas mixture comprising argon; and introducing an oxygen precursor to the plasma, wherein the oxygen precursor dissociates to form the atomic oxygen. The oxygen precursor may be selected from the group consisting of molecular oxygen, ozone, and nitrogen dioxide.

According to an exemplary embodiment, the silicon precursor is selected from the group consisting of silane, dimethylsilane, trimethylsilane, tetramethylsilane, diethylsilane, tetramethylorthosilicate (TMOS), tetraethylorthosilicate (TEOS), octamethyltrisiloxane (OMTS), octamethylcyclotetrasiloxane (OMCTS), tetramethylcyclotetrasiloxane (TOMCATS), DMDMOS, DEMS, methyl triethoxysilane (MTES), phenyldimethylsilane, and phenylsilane.

According to another exemplary embodiment, UV curing the silicon oxide layer has a processing temperature between about 20 C. and about 650 C.

According to the other exemplary embodiment, oxygen-containing environment comprises a mixture of ozone and oxygen.

According to alternative exemplary embodiment, the ozone has a percentage of about 18 wt % or less.

According to an exemplary embodiment, UV curing the silicon oxide layer has a processing time between about 1 minute and about 10 minutes.

According to alternative exemplary embodiment, UV curing the silicon oxide layer has an UV wavelength between about 200 nanometer (nm) and about 450 nm.

According to another exemplary embodiment, a method for forming a semiconductor structure includes interacting a silicon-containing precursor with at least one radical nitrogen precursor at a processing temperature of about 150 C. or less to form a silicon-nitrogen containing layer over a substrate, the silicon-containing precursor comprising two silicon atoms. The silicon-nitrogen containing layer is UV cured within an oxygen-containing environment to form a silicon oxide layer.

Additional embodiments and features are set forth in part in the description that follows, and in part will become apparent to those skilled in the art upon examination of the specification or may be learned by the practice of the invention. The features and advantages of the invention may be realized and attained by means of the instrumentalities, combinations, and methods described in the specification.

BRIEF DESCRIPTION OF THE DRAWINGS


A further understanding of the nature of some exemplary embodiments may be realized by reference to the remaining portions of the specification and the drawings wherein like reference numerals are used throughout the several drawings to refer to similar components. In some instances, a sublabel is associated with a reference numeral and follows a hyphen to denote one of multiple similar components. When reference is made to a reference numeral without specification to an existing sublabel, it is intended to refer to all such multiple similar components.

FIG. 1 is a flowchart showing an exemplary method for forming a silicon oxide layer over a substrate.

FIGS. 2A-2D are schematic cross-sectional views showing an exemplary method for forming a shallow trench isolation (STI) structure.

FIG. 3 is a simplified flow chart illustrating an exemplary method for forming a silicon oxide film over a substrate.

FIG. 4 is a configuration shows an exemplary chemical reaction process of conversion of Si-Si bonds in a silicon precursor to Si?N(H)?Si bonds then expansively into Si?O?Si bonds.

DETAILED DESCRIPTION OF THE INVENTION


Exemplary methods are described for forming a silicon oxide layer having a desired film density, a carbon concentration and/or a wet etch rate ratio (WERR) after a UV curing within an oxygen-containing environment. The UV curing may desirably increase the density of the silicon oxide layer and/or reduce the wet etch rate ratio of the silicon oxide layer.

Some exemplary methods include reacting a silicon precursor and an atomic oxygen precursor at a processing temperature of about 150 C. or less to form a silicon oxide layer over a substrate. The silicon oxide layer is ultra-violet (UV) cured within an oxygen-containing environment. Other exemplary methods include interacting a silicon-containing precursor with at least one radical nitrogen precursor at a processing temperature of about 150 C. or less to form a silicon-nitrogen containing layer over a substrate. The silicon-containing precursor may also comprise two or more silicon atoms. The silicon-nitrogen containing layer is UV cured within an oxygen-containing environment to form a silicon oxide layer.

FIG. 1 is a flowchart showing an exemplary method for forming a silicon oxide layer over a substrate. In FIG. 1, a method 100 for forming a silicon oxide layer over a substrate may include processes 102-112, for example.

Process 102 provides a substrate such as substrate 200 (shown in FIG. 2A) to a deposition chamber. The substrate 200 may be a silicon substrate, a III-V compound substrate, a silicon/germanium (SiGe) substrate, an epi-substrate, a silicon-on-insulator (SOI) substrate, a display substrate such as a liquid crystal display (LCD), a plasma display, an electro luminescence (EL) lamp display, or a light emitting diode (LED) substrate, for example. In some embodiments, the substrate 200 may include at least one structure, such as trench structure, well, junction, diode, transistor, metal-oxide-semiconductor field effect transistor (MOSFET), interlayer dielectric (ILD) structure, inter-metal dielectric (IMD) structure, circuit, other semiconductor structure or various combinations thereof. The substrate 200 may be a semiconductor wafer (e.g., a 200 mm, 300 mm, 400 mm, etc. silicon wafer). In some embodiments, the substrate 200 may have at least one trench such as trenches 210 formed therein as shown in FIG. 2A.

In some embodiments, process 104 may generate an atomic oxygen precursor outside the deposition chamber. The atomic oxygen precursor may be generated by, for example, the dissociation of an oxygen containing precursor such as molecular oxygen (O2), ozone (O3), an nitrogen-oxygen compound (e.g., NO, NO2, N2O, etc.), a hydrogen-oxygen compound (e.g., H2O, H2O2, etc.), a carbon-oxygen compound (e.g., CO, CO2, etc.), as well as other oxygen containing precursors and combinations of precursors.

In some embodiments, the dissociation of the oxygen containing precursor to generate the atomic oxygen precursor may be done by thermal dissociation, ultraviolet light dissociation, and/or plasma dissociation, among other methods. Plasma dissociation may involve striking a plasma from helium, argon, etc., in a remote plasma generating chamber and introducing the oxygen precursor to the plasma to generate the atomic oxygen precursor.

Referring again to FIG. 1, process 106 may introduce the atomic oxygen plasma to the deposition chamber where it may mix for the first time with a silicon precursor, which is introduced to the deposition chamber by process 108. In process 110, the highly reactive atomic oxygen precursor may react with the silicon precursor (and/or other deposition precursors that may be present in the deposition chamber) at moderate temperatures (e.g., processing temperatures of about 150 C. or less) to form a silicon oxide layer 220 as shown in FIG. 2B. In some embodiments, the processing temperature for forming the silicon oxide layer 220 may be between about ?10 C. and about 150 C. The formation of the silicon oxide layer 220 may reduce dimensions of the trenches 210 to the dimensions of the trenches 210a. In some embodiments, the process 110 may have pressures between about 0.5 Torr and about 6 Torr total chamber pressure.

The silicon precursor may include an organosilane compound and/or silicon compound that does not substantially contain carbon. Silicon precursors without carbon may include silane (SiH4), among others. Organosilane compounds may include compounds with direct Si?C bonding and/or compounds with Si?O?C bonding. Examples of organosilane silicon precursors may include dimethylsilane, trimethylsilane, tetramethylsilane, diethylsilane, tetramethylorthosilicate (TMOS), tetraethylorthosilicate (TEOS), octamethyltrisiloxane (OMTS), octamethylcyclotetrasiloxane (OMCTS), tetramethylcyclotetrasiloxane (TOMCATS), DMDMOS, DEMS, methyl triethoxysilane (MTES), phenyldimethylsilane, and phenylsilane, among others.

In some embodiments, the silicon precursor may be mixed with a carrier gas before or during its introduction to the deposition chamber. A carrier gas may be an inactive gas that does not substantially interfere with the formation of the oxide film on the substrate. Examples of carrier gases include helium, neon, argon, and hydrogen (H2), among other gases. Details about forming the silicon oxide layer 220 may be described in a co-assigned U.S. Patent Application, and titled ?CHEMICAL VAPOR DEPOSITION OF HIGH QUALITY FLOW-LIKE SILICON DIOXIDE USING A SILICON CONTAINING PRECURSOR AND ATOMIC OXYGEN?, the entire contents of which are hereby incorporated by reference for all purposes.

In some embodiments, the atomic oxygen precursors and silicon precursors are not mixed before being introduced to the deposition chamber. The precursors may enter the chamber through spatially separated precursor inlets distributed around the deposition chamber. For example, the atomic oxygen precursor may enter from an inlet (or inlets) at the top of the deposition chamber and configured directly above the substrate. The inlet directs the flow of the atomic oxygen precursor in a direction substantially perpendicular to the substrate deposition surface. In other embodiments, the silicon precursor may enter from one or more inlets around the sides of the deposition chamber. The inlets may direct the flow of the silicon precursor in a direction approximately parallel to the deposition surface.

Additional embodiments include sending the atomic oxygen precursors and silicon precursors through separate ports of a multi-port showerhead. For example, a showerhead positioned above the substrate may include a pattern of openings for the precursors to enter the deposition chamber. One subset of openings may be supplied by the atomic oxygen precursor, while a second subset of openings is supplied by the silicon precursor. Precursors traveling through different sets of opening may be fluidly isolated from each other until exiting into the deposition chamber. Additional details about types and designs of precursor handling equipment is described in a co-assigned U.S. patent application Ser. No. 11/754,924 by Lubomirsky et al, filed May 29, 2007, and titled ?PROCESS CHAMBER FOR DIELECTRIC GAPFILL?, the entire contents of which are hereby incorporated by reference for all purposes.

As the atomic oxygen precursors and silicon precursors react in the deposition chamber, they form the silicon oxide layer over the substrate. The initial oxide layer has desirably flowability, and may quickly migrate into gaps, openings, trenches, voids, seams, etc., in the structures present at the deposition surface. This allows the method 100 to provide oxide fills that are substantially free of voids and seams in gaps, trenches, and other surface structures. In some embodiments, the trenches 210 formed within the substrate 200 may have high height to width aspect ratios ?H/W? (e.g., ARs of about 5:1, 6:1, 6:1, 8:1, 9:1, 10:1, 11:1, and 12:1 or more) as shown in FIG. 2A.

While not wishing to be bound to a particular theory, the silicon precursors and the atomic oxygen precursors may react to form a silicon oxide that has a high concentration of silicon-hydroxyl group (Si?OH) bonds. These bonds may impart the increased flowability to the silicon oxide layer. The initial silicon oxide layer may contain a level of carbon therein. The Si?OH bonds and/or carbon may increase the wet etch rate ratio (WERR) and dielectric constant of the deposited layer, which can reduce the quality of the deposited oxide, and its effectiveness as a electrical insulator.

Referring again to FIG. 1, process 112 may UV cure the silicon oxide layer formed by the process 110 in an oxygen-containing environment. The oxygen-containing environment may include a mixture of oxygen (O2) and ozone (O3). In some embodiments, ozone within the mixture may have a percentage of about 18 wt % or less. In other embodiments, the ozone within the mixture may be about 12 wt %. The process 112 may have a processing temperature between about 20 C. and about 650 C. In some embodiments, the process 112 may have a processing time between about 1 minute and about 10 minutes. In one embodiment, the processing time is about 10 minutes. The UV curing may uses an UV wavelength between about 200 nanometer (nm) and about 450 nm. In some embodiments, the UV curing may be carried out in a NanoCure? UV twin chamber of a Producer SE? mainframe, available from Applied Materials, based in Santa Clara, Calif.

The process 112 may densify the silicon oxide layer 220 to the silicon oxide layer 220a as shown in FIG. 2C. The process 112 may reduce the concentration of the Si?OH bonds and/or the concentration of carbon within the silicon oxide layer 220. Some experiments are carried out and their results are shown in Tables 1 and 2.

TABLE 1 Precursor A Precursor B 390 C. 390 C. 390 C. 390 C. 390 C. As-dep N2 UV-Ar UV-O3 As-dep UV-Ar UV-O3 Density (g/cc) 1.7939 1.7759 1.7115 1.9600 1.4912 1.3424 2.0022 Carbon (%) 1.4 1.24 0.84 0 6.6 4.0 0 Post anneal WERR 35 7.0 15.9 5.8 >30 29 5.0 (100:1 DHF)

In Table I, two silicon oxide layers are formed with different carbon concentrations using precursors A or B by, for example, the processes 100-110 described above in conjunction with FIG. 1. The silicon oxide layer formed using precursor B has a level of carbon higher than that of the precursor A. The silicon oxide layers indicated by ?precursor A? are subjected to different curings such as nitrogen (N2) curing, UV-Ar curing and UV-O3 curing at a processing temperature of about 390 C. It is found that the carbon concentration is reduced from about 1.4 (As-dep.) to substantially near to 0 (UV-O3). The density (1.7939 g/cc) of the as-deposited silicon oxide layer is increased to about 1.9600 g/cc post UV-O3 curing. These oxide layers are then annealed in N2 environment at around 900 C. The post anneal wet etch rate ratio (WERR) of the oxide layer is reduced from about 35 (without any curing) to about 5.8 (post UV-O3 curing).

For the precursor B with a higher carbon level than the precursor A, it is found that the carbon concentration of the oxide layer is reduced from 6.6 (As-dep.) to substantially close to 0 (post UV-O3). The density (1.4912 g/cc) of the as-deposited silicon oxide layer is increased to about 2.0022 g/cc post UV-O3 curing. The post anneal wet etch rate ratio (WERR) is reduced from more than 30 (As-dep. without any curing) to about 5.0 (with UV-O3 curing). Accordingly, the UV-O3 curing may densify the as-deposited silicon oxide layer and desirably reduce the post anneal WERR of the silicon oxide layer.

According to Table 1, it is also found that the UV-O3 cured silicon oxide layer has a higher density than that of the UV-Ar cured silicon oxide layer or that of the N2 cured silicon oxide layer. The UV-O3 cured silicon oxide layer has a lower post anneal WERR than that of the UV-Ar cured silicon oxide layer or that of the N2 cured silicon oxide layer.

TABLE 2 Precursor A Precursor B 100 C. 300 C. 390 C. 500 C. 100 C. 200 C. 300 C. 400 C. 500 C. Density (g/cc) 1.9794 1.9792 1.9600 2.0342 1.9683 1.9794 1.9600 2.0022 1.9731 Carbon (%) 0 0 0 0 1.1 0 0 0 0 Post anneal 6.1 6.4 5.8 4.7 2.5 3.0 4.4 5.0 4.5 WERR (100:1 DHF)

In Table 2, the silicon oxide layers indicated with ?Precursor A? are subjected to UV-O3 curing at different temperatures, e.g., 100 C., 300 C., 390 C. and 500 C.; and the silicon oxide layers indicated with ?Precursor B? are subjected to UV-O3 curing at different temperatures, e.g., 100 C., 200 C., 300 C., 400 C. and 500 C. It is found that the UV-O3 curing may achieve desired density and post anneal WERR of the silicon oxide layers at low processing temperature of about 100 C.

FIG. 2D is a cross-sectional view showing an exemplary STI structure. In FIG. 2D, a dielectric layer 230 such as a high density plasma chemical vapor deposition (HDP CVD) layer is formed over the cured silicon oxide layer 220a. Since the cured silicon oxide layer 220a has a thickness at the bottom region of the trenches 210 larger than that on the sidewalls of the trenches 210, the aspect ratio of the trenches 210a may be desirably reduced. Accordingly, the dielectric layer 230 may be formed and filled within the trenches 210a without substantially forming seams, gaps or voids within the dielectric layer 230.

In some embodiments, the dielectric layer 230 may be subjected to a thermal treatment such as an anneal process (not shown). The thermal treatment may desirably densify the dielectric layer 230. In other embodiments, the processes for forming the dielectric layer 230 and the thermal treatment may be optional. The silicon oxide layer 220 (shown in FIG. 2B) may be formed and substantially fill the trenches 210.

FIG. 3 is a simplified flow chart illustrating another exemplary method for forming a silicon oxide film over a substrate. In FIG. 3, the method 300 may utilize the chemical reaction process described below in connection to FIG. 4 to form a silicon oxide film. Exemplary method 300 may include a non-exhaustive series of steps to which additional steps (not shown) may also be added. One of ordinary skill in the art would recognize many variations, modifications, and alternatives. In some embodiments, the method 300 may include providing a substrate in a deposition chamber (302); and introducing one or more silicon containing precursors with at least a Si?Si bond in their molecular framework into the deposition chamber (304). The method 300 may include generating one or more radical nitrogen precursors (306). For example, the one or more radical nitrogen precursors may be generated in a remote ammonia plasma system coupled to the deposition chamber.

The method 300 may include introducing the one or more radical nitrogen precursors into the deposition chamber (308). The method 300 may react one or more radical nitrogen precursors and the one or more silicon containing precursors (310) to form a flowable dielectric film with Si?N(H)?Si bonds on the substrate. In some embodiments, the process 310 may have a processing temperature of about 150 C. or less.

In some embodiment, the one or more silicon containing precursors used in the CVD process include multiple hydroxyl groups in their molecular frameworks. The hydroxyl groups are retained in the CVD-deposited film providing a flow-like characteristic of the film that is similar to that of conventional SOG (Spin-on-Glass) film. Because of the flow-like characteristic, the CVD-deposited film based on method 300 tends to be collected in the bottom portion of substrate gap or trench during the deposition, reducing the occurrence of voids around the center of the gapfill or STI trench. In another embodiment, the one or more silicon containing precursors with at least a Si?Si bond in their molecular frameworks include disilane and/or polysilane precursors. The disilanes have a single Si?Si unit in their molecular framework while the polysilanes may have multiple Si?Si bonds. For example, disilanes with different substituents can be used, including alkoxy disilanes, alkoxy-alkyl disilanes, and alkoxy-acetoxy disilanes. In additional examples, disilanes with higher homologues may also be used. Of course, one of skilled in the art would recognize many alternatives, variations, and modifications in the selection of di- and polysilane precursors.

In some embodiments, reactive nitrogen species (such as ?N, ?NH, and ?NH2) used in method 300 may be generated by introducing ammonia (NH3) in a remote plasma system. The remote plasma system may include a separate chamber that is coupled to the deposition chamber. The decomposition of ammonia in the remote plasma system produces radical nitrogen precursors, such as hydronitrene radicals like NH or NH2. Atomic hydrogen (H) radicals may also be generated. For example, hydronitrene and hydrogen radicals are generated in process 306 of the method 300. The radical nitrogen precursors may then be transferred to the deposition chamber where the one or more silicon containing precursors have been independently introduced. For example, the reactive nitrogen precursor may be transferred through a showerhead, while the silicon precursor is introduced through a plurality of fluted nozzles. Details about forming the silicon-oxygen containing layer may be described in a co-assigned U.S. Patent Application, and titled ?HIGH QUALITY SILICON OXIDE FILMS BY REMOTE PLASMA CVD FROM DISILANE PRECURSORS?, the entire contents of which are hereby incorporated by reference for all purposes.

After the formation of the silicon-oxygen containing layer, the method 300 may include UV curing (312) the CVD-deposited flowable dielectric film into a silicon oxide film within an oxygen-containing environment. The UV curing (312) may include a film expansion due to the conversion of Si?N(H)?Si bonds to Si?O?Si bonds that counteracts a film shrinkage due to the removal of some hydroxyl groups from the CVD-deposited film. As a result, the balance of the film expansion and shrinkage leads to a dense, void-free silicon oxide film that also has a reduced probability of cracking due to stresses being introduced during the deposition and anneal.

In some embodiments, the UV curing (312) may be similar to the UV curing (112) described above in conjunction with FIG. 1. The processes described in conjunction with FIG. 2D may cooperate with the method 300 shown in FIG. 3. One of ordinary skill in the art may modify the process flow to achieve a desired semiconductor structure.

FIG. 4 is a configuration schematically showing an exemplary chemical reaction process of conversion of Si?Si bonds in a silicon precursor to Si?N(H)?Si bonds then expansively into Si?O?Si bonds. This diagram is merely an example, which should not unduly limit the scope of the claims herein. One of ordinary skill in the art would recognize other variations, modifications, and alternatives. As shown, the chemical reaction is a CVD (Chemical Vapor Deposition) process during which a silicon containing precursor with at least one Si?Si bond is mixed with a radical nitrogen species generated from the decomposition of ammonia in a remote plasma (i.e., a plasma formed separately from the deposition of the flowable Si?N(H)?Si film). The CVD process leads to conversion of Si?Si bonds in the silicon precursor (or precursors) to Si?N(H)?Si bonds. The Si?N(H)?Si bonds are then converted to Si?O?Si bonds during a subsequent UV-O3 curing, where the annealing may be done in, for example, an oxygen-containing (e.g., a mixture of oxygen and ozone) environment.

In some embodiments, the CVD process includes introducing at least two reactants independently into a deposition chamber and letting them react at a pre-determined condition. In one embodiment, a first reactant can be one type of precursor selected from a group consisting of Alkoxy Disilanes, Alkoxy-Alkyl Disilanes, Alkoxy-Acetoxy Disilanes, and Polysilanes. For example, the Alkoxy Disilanes include Si2(EtO)6 Ethoxy Disilanes, Si2(MeO)6 Methoxy Disilanes, and Si6(MeO)12 Methoxy Cyclohexylsilanes, where Et denotes Ethyl group (C2H6) and Me denotes Methyl group (CH3). In another example, the Alkoxy-Alkyl Disilanes may include Si2(EtO)4(Me)2 Tetraethoxy-Dimethyl Disilanes, Si2(EtO)4(Et)2 Tetraethoxy-Diethyl Disilanes, Si2(EtO)2(Me)4 Diethoxy-Tetramethyl Disilanes, Si2(MeO)4(Me)2 Tetramethoxy-Dimethyl Disilanes, and Si4O2(Me)8 Methyl Cyclohexylsiloxanes, Si6(MeO)6(Me)6 Methoxy-Methyl Cyclohexylsilanes, Si4O2(H2)4 Hydro-Cyclohexylsiloxanes. In yet another example, the Alkoxy-Acetoxy Disilanes may include Si2(AcO)6 Acetoxy Disilanes, Si2(Me)4(AcO)2 Tetramethyl-Diacetoxy Disilanes, and Si2(Me)2(AcO)4 Dimethyl-Tetracetoxy Disilanes, where Ac denotes Acetyl group. And in yet still another example, the polysilanes includes cyclopentylsilanes or other subinstitutes. Either one of these precursors mentioned above may be supplied into the deposition chamber without meeting any of the other reactant for the CVD process.

In other embodiments, the other reactant for the CVD process may be a second reactant including radical nitrogen species generated from remote ammonia plasma. For example, the radical nitrogen species may include nitrogen ions, hydronitrene radicals NHx, where x=1, or 2. Because in the molecular frameworks of those Disilane or Polysilane based precursors there is at least a Si?Si bond which is highly reactive, the CVD process may result in a product containing a plurality of Si?N(H)?Si bonds in addition to hydroxyl groups and carbon-based species. For example, the product is a silicon carbonitride film deposited on the substrate. The CVD-desposited silicon carbonitride film is amorphous and flowable due to the existence of those hydroxyl groups and carbon-based species.

In some embodiments, the subsequent UV-O3 curing within an oxygen-containing environment induces another chemical reaction between the silicon carbonitride film and oxygen (O). This reaction is an oxidization process in which the Si?N(H)?Si bond in the silicon carbonitride film is converted into Si?O?Si bond, resulting a formation of an silicon oxide film. One side product may include NH3 ammonia which can be immediately pumped out through an exhaust system built for the chamber.

Where a range of values is provided, it is understood that each intervening value, to the tenth of the unit of the lower limit unless the context clearly dictates otherwise, between the upper and lower limits of that range is also specifically disclosed. Each smaller range between any stated value or intervening value in a stated range and any other stated or intervening value in that stated range is encompassed within the invention. The upper and lower limits of these smaller ranges may independently be included or excluded in the range, and each range where either, neither or both limits are included in the smaller ranges is also encompassed within the invention, subject to any specifically excluded limit in the stated range. Where the stated range includes one or both of the limits, ranges excluding either or both of those included limits are also included in the invention.

As used herein and in the appended claims, the singular forms ?a?, ?and?, and ?the? include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to ?a process? may includes a plurality of such processes and reference to ?the nozzle? may include reference to one or more nozzles and equivalents thereof known to those skilled in the art, and so forth.

Also, the words ?comprise,? ?comprising,? ?include,? ?including,? and ?includes? when used in this specification and in the following claims are intended to specify the presence of stated features, integers, components, or steps, but they do not preclude the presence or addition of one or more other features, integers, components, steps, or groups.

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